RAM 4.5 BUX II Series Bedienungsanleitung PDF herunterladen (Seite 38)

DE1 User Manual

4.6 Using VGA

The DE1 board includes a 16-pin D-SUB connector for VGA output. The VGA synchronization

signals are provided directly from the Cyclone II FPGA, and a 4-bit DAC using resistor network is

used to produce the analog data signals (red, green, and blue). The associated schematic is given in

Figure 4.11 and can support standard VGA resolution (640x480 pixels, at 25 MHz).

Figure 4.11. VGA circuit schematic.

The timing specification for VGA synchronization and RGB (red, green, blue) data can be found on

various educational web sites (for example, search for “VGA signal timing”). Figure 4.12 illustrates

the basic timing requirements for each row (horizontal) that is displayed on a VGA monitor. An

active-low pulse of specific duration (time a in the figure) is applied to the horizontal

synchronization (hsync) input of the monitor, which signifies the end of one row of data and the

start of the next. The data (RGB) inputs on the monitor must be off (driven to 0 V) for a time period

called the back porch (b) after the hsync pulse occurs, which is followed by the display interval (c).

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RAM 4.5 BUX II Series Bedienungsanleitung Seite 38