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10. Partial Compliance to Standards
31
Note that some processors have special requirements related to virtual memory.
10. Partial Compliance to Standards
Many devices of all types have claims that they support certain standards.
However, when the device’s errata are examined closely, there are significant
exceptions. In general, VxWorks libraries are built to support the full standard sets.
When significant exceptions are present, the devices may not work with the
VxWorks libraries. For this reason, it is important to make sure that the devices
used in the hardware design are fully compliant with the standards, or there may
be serious redesign issues when the incompatibility issues are uncovered.
The general rule is this: if the chip has a feature or feature set with reduced
capability, do not count on having access to that feature or feature set from
VxWorks at all. VxWorks libraries are tested with devices which are known to have
good adherence to the standards, not with devices which have poor adherence to
the standards.
This affects all of the parts on a board design, from the processor right on down.
One of the processors which exhibits this problem is one specific variation of the
MIPS processor. This processor has only single-precision, floating-point support as
a cost savings measure, and can only be configured to use 32 single-precision (that
is, 32-bit) floating-point registers. Wind River builds the floating-point library
routines for MIPS64 with double-precision floating point, so that they support 32
double-precision registers. And the MIPS32 floating-point support is designed to
accommodate sixteen double-precision registers. But neither configuration will
work for that processor, because it can only be configured to use 32 single-precision
floating-point registers. Because of this incompatibility, applications for boards
using this chip cannot use hardware floating point without costly floating-point
library revision. In this case, software floating point is the recommended
resolution.
Another example might be a PCI host bridge. An existing PCI host bridge intended
for high-end server applications was designed so that it allowed only 64-bit
!
CAUTION: Due to a limitation in the current implementation of VxWorks, virtual
addresses must equal physical addresses when using 68K MMUs (68K support is
available for VxWorks 5.5 only).
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