RAM 6.0 BUX II Series Betriebsanweisung PDF herunterladen (Seite 13)

6. Bus Support

NV_RAM_SIZE, NV_BOOT_OFFSET, and NV_RAM_ADRS. These macros are

usually defined in config.h, bspname.h, or configAll.h.

Parity Checking

VxWorks makes no direct use of memory parity checking on the RAM. If parity

checking is desired or needed, it is usually left to the BSP or the user to enable

parity and to implement a parity error handling routine. Some architectures may

specify an interrupt or exception vector to be used for parity error handling.

Addressing

The address map for VxWorks itself is not important; however, a complex

distribution of code and data within memory might not be supported by the

toolchain.

The normal configuration methods use only three variables to determine address

mapping:

RAM_HIGH_ADRS, RAM_LOW_ADRS, and ROM_TEXT_ADRS. More

complex address maps are not recommended.

6. Bus Support

This section describes issues of concern when considering the following bus types:

■

PCI, cPCI, and PMC

■

VMEbus

■

busless

PCI, cPCI, and PMC

Wind River provides drivers compliant with revision 2.2 of the PCI Specifications.

These drivers provide support for manual and automatic configuration and

enumeration of devices. Also provided is an interrupt library module that handles

the overloading of PCI interrupt sources. Refer to the reference entries for

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RAM 6.0 BUX II Series Betriebsanweisung Seite 13