RAM 1.4 Bedienungsanleitung Seite 8

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PPP and ATM Termination Type C RAM Package Release 1.4.1
8 Freescale Semiconductor
Bug Fixes
Activating multiple instances of Virtual Port may cause memory corruptions. This mode should not be
used.
External request event register width in MPC8568E is 16 bits. Virtual Port uses this event register and the
definition assumes 32 bits register (as in MPC8360E). Thus event registers do not function in MPC8568
The following Ethernet scheduler’s wrong functionality has been fixed:
1. Long response time for rate limiter changes.
2. Scheduler inaccuracy of up to 6% for different frame lengths and band width rates.
A frame which is forwarded from the Virtual Port to the Ethernet Tx port can pass Header Compression.
In interworking, the driver always sets MAXD1 to be identical to Max Frame Length {MFL}. Microcode
rounds up MAXD1 to multiples of MRBLR.
In HES mode, adding LP’s on Run time may cause other LP’s to stop transmitting for a random period of
time or stop at all.
Table 13. Revision History—Revision 0.0.1 (continued)
Release 0.0.1
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